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<StrategicPlan xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xmlns:stratml="urn:ISO:std:iso:17469:tech:xsd:stratml_core"><Name>Safe and Secure Operations</Name><Description/><OtherInformation/><StrategicPlanCore><Organization><Name>Office of Safe and Secure Operations</Name><Acronym>IARPASSO</Acronym><Identifier>_44bbc824-149a-11e5-af57-fdf416f00357</Identifier><Description>The Office of Safe and Secure Operations (SSO) focuses on the IC's ability to operate freely and effectively in an often hostile and increasingly interdependent and resource-constrained environment. Key research focus areas for SSO include information assurance, advanced computing technologies and architectures, quantum information science and technology, and threat detection and mitigation.</Description><Stakeholder StakeholderTypeType="Person"><Name>Dr. William Vanderlinde</Name><Description>Office Director</Description></Stakeholder></Organization><Vision><Description/><Identifier>_44bbcbee-149a-11e5-af57-fdf416f00357</Identifier></Vision><Mission><Description>To enable the IC to operate freely and effectively in a hostile, interdependent, and resource-constrained environment.</Description><Identifier>_44bbcdec-149a-11e5-af57-fdf416f00357</Identifier></Mission><Value><Name/><Description/></Value><Goal><Name>Cryogenic Computing Complexity (C3)</Name><Description>Establish superconducting computing as a long-term solution to the power- cooling problem and a successor to end-of-roadmap CMOS for high performance computing</Description><Identifier>_44bbcec8-149a-11e5-af57-fdf416f00357</Identifier><SequenceIndicator>1</SequenceIndicator><Stakeholder StakeholderTypeType="Person"><Name>Marc Manheimer</Name><Description>Program Manager</Description></Stakeholder><Stakeholder StakeholderTypeType="Organization"><Name>IARPA EDA for SCE Program</Name><Description>Related Program</Description></Stakeholder><OtherInformation>Power and cooling for large-scale computing systems are rapidly becoming unmanageable problems for the enterprises which depend on them. The trend towards large, centralized computing facilities to house supercomputers, data centers, and special purpose computers continues to grow, driven by cloud computing, support of mobile devices, Internet traffic volume, and computation-intensive applications. In 2012, the total power demand of the TOP500 supercomputers measured around 0.25 GW; the total power usage of the, roughly, 500,000 data centers worldwide was estimated to be 31 GW in 2011. Conventional computing systems, which are based on complementary metal-oxide-semiconductor (CMOS) switching devices and normal metal interconnects, appear to have no path to be able to increase energy efficiency fast enough to keep up with increasing demands for computation.

Superconducting computing could offer an attractive low-power alternative to CMOS with many potential advantages. Josephson junctions, the superconducting switching devices, switch quickly (~1 ps), dissipate little energy per switch (&lt; 10^-19 J), and communicate information via small current pulses that propagate over superconducting transmission lines nearly without loss. While, in the past, significant technical obstacles prevented serious exploration of superconducting computing, recent innovations have created foundations for a major breakthrough. For example, the new single flux quantum (SFQ) logic circuits have no static power dissipation, and new energy efficient cryogenic memory ideas allow operation of memory and logic within the cold environment. Studies indicate that superconducting supercomputers may be capable of 1 PFLOP/s for about 25 kW and 100 PFLOP/s for about 200 kW, including the cryogenic cooler. Proof at smaller scales is an essential first step before any attempt to build a supercomputer.

Superconducting computing research currently consists of a few, scattered efforts with no initiative focused on advancing the field overall. Major research challenges include insufficient memory, insufficient integration density, and no realization of complete computing systems. The C3 Program will address these challenges with the goal of establishing superconducting computing as a long-term solution to the power- cooling problem and a successor to end-of-roadmap CMOS for high performance computing. Success of C3 will pave the way to a new generation of superconducting computers that are far more energy efficient than end-of-roadmap CMOS and scalable to practical application.

IARPA expects that the C3 program will be a five-year, two-phase program. Phase one, which encompasses the first three years, serves primarily to develop the technologies that are required to demonstrate a small superconducting processor. Phase two, for the final two years, will integrate those new technologies into a small-scale working model of a superconducting computer.

C3 Program thrusts will include:

Cryogenic memory: New approaches to enable high performance computing systems with greatly improved memory capacity and energy efficiency.
Logic, communications and systems: Development of advanced superconducting circuits and integration with memory and other components for demonstration of a limited superconducting computer system on which to measure performance metrics.
IARPA expects that each proposal will address fully a single thrust. If a proposer wishes to propose against more than one thrust, then separate proposals should be submitted. Proposals are not desired that address only a small portion of a thrust’s goals. Collaborative efforts and teaming among potential performers will be strongly encouraged. Participation is open to individuals and organizations from around the world so long as the prime contractor is a US organization.</OtherInformation><Objective><Name>Cryogenic Memory</Name><Description>Enable high performance computing systems with greatly improved memory capacity and energy efficiency.</Description><Identifier>_44bbd044-149a-11e5-af57-fdf416f00357</Identifier><SequenceIndicator>1.1</SequenceIndicator><Stakeholder StakeholderTypeType=""><Name/><Description/></Stakeholder><OtherInformation/></Objective><Objective><Name>Logic, Communications &amp; Systems</Name><Description>Develop of advanced superconducting circuits and integrate with memory and other components for demonstration of a limited superconducting computer system on which to measure performance metrics.</Description><Identifier>_44bbd134-149a-11e5-af57-fdf416f00357</Identifier><SequenceIndicator>1.2</SequenceIndicator><Stakeholder StakeholderTypeType=""><Name/><Description/></Stakeholder><OtherInformation/></Objective></Goal><Goal><Name>Circuit Analysis Tools (CAT)</Name><Description>Develop tools and techniques for circuit analysis at future technology nodes, at 22 nm and beyond.</Description><Identifier>_44bbd206-149a-11e5-af57-fdf416f00357</Identifier><SequenceIndicator>2</SequenceIndicator><Stakeholder StakeholderTypeType="Person"><Name>Carl McCants</Name><Description>Program Manager</Description></Stakeholder><Stakeholder StakeholderTypeType="Generic_Group"><Name>Semiconductor Industry</Name><Description/></Stakeholder><OtherInformation>The semiconductor industry continues to scale integrated circuits in accordance with Moore's law, and is currently developing the processing and design infrastructure at the 22 nm technology node and beyond. However, analysis tools, instrumentation, and methods have not kept pace with the need for improved analytical capability and metrology of these complex circuits. To ensure that the government’s capabilities keep pace with Moore’s Law, the Circuit Analysis Tools (CAT) program is developing tools and techniques that are necessary for circuit analysis at future technology nodes, specifically, at 22 nm and beyond. This also includes analysis tools capable of working with the advanced packaging of circuits at these nodes including, but not limited to, stacked die and integrated 3-dimensional ICs. The program is divided into four thrust areas: circuit edit, fault isolation, logic analysis, and fast imaging, with each area having some goals associated with sample preparation. The development tasks for each of these thrusts will focus on developing an analysis tool as a laboratory platform to demonstrate capability at the 22 nm node in Phase 1, and building and optimizing a prototype tool to demonstrate capability at the 11 nm node in Phase 2.</OtherInformation><Objective><Name/><Description/><Identifier>_44bbd3b4-149a-11e5-af57-fdf416f00357</Identifier><SequenceIndicator/><Stakeholder StakeholderTypeType=""><Name/><Description/></Stakeholder><OtherInformation/></Objective></Goal><Goal><Name>Coherent Superconducting Qubits (CSQ)</Name><Description>Demonstrate a reproducible, ten-fold increase in coherence times in superconducting qubits.</Description><Identifier>_44bbd49a-149a-11e5-af57-fdf416f00357</Identifier><SequenceIndicator>3</SequenceIndicator><Stakeholder StakeholderTypeType="Person"><Name>Karl F. Roenigk</Name><Description>Program Manager</Description></Stakeholder><Stakeholder StakeholderTypeType="Organization"><Name>IARPA MQCO Program</Name><Description>Related Program</Description></Stakeholder><Stakeholder StakeholderTypeType="Organization"><Name>IARPA QCS Program</Name><Description>Related Program</Description></Stakeholder><OtherInformation>The goal of the CSQ program is to demonstrate a reproducible, ten-fold increase in coherence times in superconducting qubits. To achieve this goal, researchers are focused on developing 1) fundamental understanding of defects that currently limit coherence times (T1 and T2) and readout fidelity; 2) means to characterize, measure and definitively discriminate between separate defect mechanisms contributing to loss and dephasing; and 3) novel designs, materials and fabrication methods to eliminate these defects.</OtherInformation><Objective><Name>Coherence &amp; Readout</Name><Description>Develop fundamental understanding of defects that currently limit coherence times (T1 and T2) and readout fidelity</Description><Identifier>_44bbd576-149a-11e5-af57-fdf416f00357</Identifier><SequenceIndicator>3.1</SequenceIndicator><Stakeholder StakeholderTypeType=""><Name/><Description/></Stakeholder><OtherInformation/></Objective><Objective><Name>Loss &amp; Dephasing</Name><Description>Develop means to characterize, measure and definitively discriminate between separate defect mechanisms contributing to loss and dephasing</Description><Identifier>_44bbd710-149a-11e5-af57-fdf416f00357</Identifier><SequenceIndicator>3.2</SequenceIndicator><Stakeholder StakeholderTypeType=""><Name/><Description/></Stakeholder><OtherInformation/></Objective><Objective><Name>Designs, Materials &amp; Fabrication</Name><Description>Develop novel designs, materials and fabrication methods to eliminate these defects.</Description><Identifier>_44bbddbe-149a-11e5-af57-fdf416f00357</Identifier><SequenceIndicator>3.3</SequenceIndicator><Stakeholder StakeholderTypeType=""><Name/><Description/></Stakeholder><OtherInformation/></Objective></Goal><Goal><Name>Logical Qubits (LogiQ)</Name><Description>Encode imperfect physical qubits into a logical qubit that protects against decoherence, gate errors, and deleterious environmental influences.</Description><Identifier>_44bbdf12-149a-11e5-af57-fdf416f00357</Identifier><SequenceIndicator>4</SequenceIndicator><Stakeholder StakeholderTypeType="Person"><Name>David L. Moehring</Name><Description>Program Manager</Description></Stakeholder><OtherInformation>The LogiQ program in IARPA's Safe and Secure Operations (SSO) Office is seeking creative technical solutions to the challenge of encoding imperfect physical qubits into a logical qubit that protects against decoherence, gate errors, and deleterious environmental influences. Underpinning the program's strategy to build a logical qubit is a push for higher fidelity in multi-qubit operations, the pursuit of dynamically controlled experiments in multi-qubit systems to remove entropy from the system during computation, and characterization and mitigation of environmental noise and correlated errors. Recognizing that success in building a logical qubit is critically dependent on maintaining the proper balance between basic science and engineering, LogiQ looks to bring together diverse technical skills among leading physicists, engineers, and computer scientists.

While quantum information processing has witnessed tremendous advances in high-fidelity qubit operations and an increase in the size and complexity of controlled quantum computing systems, it still suffers from physical-qubit gate and measurement fidelities that fall short of desired thresholds, multi-qubit systems whose overall performance is inferior to that of isolated qubits, and non-extensible architectures -- all of which hinder their path toward fault-tolerance. In order to capture the full range of issues that impact the development of a larger quantum processor, it is important to focus on improving all of these aspects concurrently. Moreover, it is essential to develop relevant error budgets and statistics that can robustly estimate system performance from isolated performance metrics.

The LogiQ program attempts to tackle these problems by building a logical qubit from constituent physical qubits. This focused effort will combine improved multi-qubit operational fidelity with extensible integration and closed-loop feedback capable of preserving an arbitrary superposition in the logical-qubit code subspace. LogiQ aims to:</OtherInformation><Objective><Name>Complexity &amp; Requirements</Name><Description>Experimentally address the true complexity and requirements for encoding quantum information into a logical subspace</Description><Identifier>_44bbe066-149a-11e5-af57-fdf416f00357</Identifier><SequenceIndicator>4.1</SequenceIndicator><Stakeholder StakeholderTypeType=""><Name/><Description/></Stakeholder><OtherInformation/></Objective><Objective><Name>Error Environment</Name><Description>Ascertain the complete error environment in a system of over ten connected physical qubits</Description><Identifier>_44bbe124-149a-11e5-af57-fdf416f00357</Identifier><SequenceIndicator>4.2</SequenceIndicator><Stakeholder StakeholderTypeType=""><Name/><Description/></Stakeholder><OtherInformation/></Objective><Objective><Name>Temporal &amp; Spatial Correlations</Name><Description>Characterize temporal and spatial correlations affecting system performance</Description><Identifier>_44bbe125-149a-11e5-af57-fdf416f00357</Identifier><SequenceIndicator>4.3</SequenceIndicator><Stakeholder StakeholderTypeType=""><Name/><Description/></Stakeholder><OtherInformation/></Objective><Objective><Name>Open Loop Control</Name><Description>Choreograph and optimize open loop control of individual qubits throughout gate operations</Description><Identifier>_44bbe2aa-149a-11e5-af57-fdf416f00357</Identifier><SequenceIndicator>4.4</SequenceIndicator><Stakeholder StakeholderTypeType=""><Name/><Description/></Stakeholder><OtherInformation/></Objective><Objective><Name>Closed Loop Feedback</Name><Description>Implement the closed loop feedback needed to compensate for errors and determine the required level of synchronicity and operational scheduling</Description><Identifier>_44bbe4b2-149a-11e5-af57-fdf416f00357</Identifier><SequenceIndicator>4.5</SequenceIndicator><Stakeholder StakeholderTypeType=""><Name/><Description/></Stakeholder><OtherInformation/></Objective><Objective><Name>Crosstalk</Name><Description>Characterize crosstalk and determine the level of mitigation required for high-fidelity logical-qubit operations</Description><Identifier>_44bbe5a2-149a-11e5-af57-fdf416f00357</Identifier><SequenceIndicator>4.6</SequenceIndicator><Stakeholder StakeholderTypeType=""><Name/><Description/></Stakeholder><OtherInformation/></Objective><Objective><Name>Requirements</Name><Description>Establish the logical-qubit requirements of classical control infrastructure, latencies, speed and fidelity of measurement, etc.</Description><Identifier>_44bbe5a3-149a-11e5-af57-fdf416f00357</Identifier><SequenceIndicator>4.7</SequenceIndicator><Stakeholder StakeholderTypeType=""><Name/><Description/></Stakeholder><OtherInformation/></Objective><Objective><Name>Controllers &amp; Measurement Devices</Name><Description>Develop classical controllers and measurement devices to manipulate physical qubits appropriate for logical-qubit processing</Description><Identifier>_44bbe5a4-149a-11e5-af57-fdf416f00357</Identifier><SequenceIndicator>4.8</SequenceIndicator><Stakeholder StakeholderTypeType=""><Name/><Description/></Stakeholder><OtherInformation/></Objective><Objective><Name>Qubit Re-Use &amp; Ancilla Reset</Name><Description>Develop the capability for timely physical qubit re-use and ancilla reset, and perform dynamically controlled experiments</Description><Identifier>_44bbe5a5-149a-11e5-af57-fdf416f00357</Identifier><SequenceIndicator>4.9</SequenceIndicator><Stakeholder StakeholderTypeType=""><Name/><Description/></Stakeholder><OtherInformation/></Objective><Objective><Name>Extensibility</Name><Description>Include extensibility in the logical qubit design to provide flexibility for future, more complex systems.</Description><Identifier>_44bbe5a6-149a-11e5-af57-fdf416f00357</Identifier><SequenceIndicator>4.10</SequenceIndicator><Stakeholder StakeholderTypeType=""><Name/><Description/></Stakeholder><OtherInformation/></Objective></Goal><Goal><Name>Machine Intelligence from Cortical Networks (MICrONS)</Name><Description>Reverse-engineer the algorithms of the brain.</Description><Identifier>_44bbe5a7-149a-11e5-af57-fdf416f00357</Identifier><SequenceIndicator>5</SequenceIndicator><Stakeholder StakeholderTypeType="Person"><Name>R. Jacob Vogelstein</Name><Description>Program Manager</Description></Stakeholder><Stakeholder StakeholderTypeType="Organization"><Name>IARPA ICArUS Program</Name><Description>Related Program</Description></Stakeholder><Stakeholder StakeholderTypeType="Organization"><Name>IARPA KRNS Program</Name><Description>Related Program</Description></Stakeholder><Stakeholder StakeholderTypeType="Organization"><Name>IARPA SHARP Program</Name><Description>Related Program</Description></Stakeholder><OtherInformation>MICrONS seeks to revolutionize machine learning by reverse-engineering the algorithms of the brain. The program is expressly designed as a dialogue between data science and neuroscience. Participants in the program will have the unique opportunity to pose biological questions with the greatest potential to advance theories of neural computation and obtain answers through carefully planned experimentation and data analysis. Over the course of the program, participants will use their improving understanding of the representations, transformations, and learning rules employed by the brain to create ever more capable neurally derived machine learning algorithms. Ultimate computational goals for MICrONS include the ability to perform complex information processing tasks such as one-shot learning, unsupervised clustering, and scene parsing, aiming towards human-like proficiency.</OtherInformation><Objective><Name>Information Processing</Name><Description>Perform complex information processing tasks such as one-shot learning, unsupervised clustering, and scene parsing</Description><Identifier>_44bbe750-149a-11e5-af57-fdf416f00357</Identifier><SequenceIndicator>5.1</SequenceIndicator><Stakeholder StakeholderTypeType=""><Name/><Description/></Stakeholder><OtherInformation/></Objective></Goal><Goal><Name>Multi-Qubit Coherent Operations (MQCO)</Name><Description>Resolve the technical challenges involved in fabricating and operating multiple qubits in close proximity.</Description><Identifier>_44bbe8a4-149a-11e5-af57-fdf416f00357</Identifier><SequenceIndicator>6</SequenceIndicator><Stakeholder StakeholderTypeType="Person"><Name>David Moehring</Name><Description>Program Manager</Description></Stakeholder><Stakeholder StakeholderTypeType="Organization"><Name>IARPA CSQ Program</Name><Description>Related Program</Description></Stakeholder><Stakeholder StakeholderTypeType="Organization"><Name>IARPA LogiQ Program</Name><Description>Related Program</Description></Stakeholder><Stakeholder StakeholderTypeType="Organization"><Name>IARPA QCS Program</Name><Description>Related Program</Description></Stakeholder><OtherInformation>The Multi-Qubit Coherent Operations Program aims to resolve the technical challenges involved in fabricating and operating multiple qubits in close proximity. The main themes of the program include qubit fabrication and yield; cross talk within the multi-qubit system; incorporation of the controls necessary to operate multiple qubits; coupling qubits to generate a universal gate set for quantum operations; and minimizing the overall system footprint. The program is comprised of different technologies including atomic and solid state based qubits. The end goal of the program is to execute quantum algorithms using multiple qubits and to evaluate the performance using a metric that can scale to higher qubit numbers.</OtherInformation><Objective><Name/><Description/><Identifier>_44bbe9f8-149a-11e5-af57-fdf416f00357</Identifier><SequenceIndicator/><Stakeholder StakeholderTypeType=""><Name/><Description/></Stakeholder><OtherInformation/></Objective></Goal><Goal><Name>Quantum Computer Science (QCS)</Name><Description>Build a foundation for measuring and reducing the resources required to program and implement complex quantum algorithms of realistic size.</Description><Identifier>_44bbec28-149a-11e5-af57-fdf416f00357</Identifier><SequenceIndicator>7</SequenceIndicator><Stakeholder StakeholderTypeType="Person"><Name>Mark I. Heiligman</Name><Description>Program Manager</Description></Stakeholder><Stakeholder StakeholderTypeType="Organization"><Name>IARPA CSQ Program</Name><Description>Related Program

</Description></Stakeholder><Stakeholder StakeholderTypeType="Organization"><Name>IARPA MQCO Program</Name><Description>Related Program</Description></Stakeholder><OtherInformation>The IARPA Quantum Computer Science (QCS) Program explores questions relating to the computational resources required to run quantum algorithms on realistic quantum computers.

Any implementation of a quantum algorithm requires not only programming the algorithm at a logical level but also the incorporation of error correction and control schemes at the physical level, and resource estimation must account for all of these factors. The QCS program is developing a tool chain to study these issues throughout the computing process.

The tools will include an integrated development environment for the quantum programming languages already developed by the program, compilers to generate logical circuits, and tools for analyzing quantum error correction and control protocols. Through its research QCS will build a foundation for measuring and reducing the resources required to program and implement complex quantum algorithms of realistic size.</OtherInformation><Objective><Name/><Description/><Identifier>_44bbed7c-149a-11e5-af57-fdf416f00357</Identifier><SequenceIndicator/><Stakeholder StakeholderTypeType=""><Name/><Description/></Stakeholder><OtherInformation/></Objective></Goal><Goal><Name>Security and Privacy Assurance Research (SPAR)</Name><Description>Build on the IARPA Automatic Privacy Protection (APP) Program.</Description><Identifier>_44bbeeb2-149a-11e5-af57-fdf416f00357</Identifier><SequenceIndicator>8</SequenceIndicator><Stakeholder StakeholderTypeType="Person"><Name>Edward Baranoski</Name><Description>Program Manager</Description></Stakeholder><Stakeholder StakeholderTypeType="Organization"><Name>IARPA STONESOUP Project</Name><Description>Related Program</Description></Stakeholder><OtherInformation>IARPA started the Security and Privacy Assurance Research (SPAR) Program in 2011, building on the past IARPA Automatic Privacy Protection (APP) Program. SPAR's program goals are to:</OtherInformation><Objective><Name>Database Queries</Name><Description>Develop prototype implementations of efficient cryptographic protocols for querying a database that keep the query confidential, yet still allow the database owner to determine if the query is authorized and, if so, return only those records that match it</Description><Identifier>_44bbefe8-149a-11e5-af57-fdf416f00357</Identifier><SequenceIndicator>8.1</SequenceIndicator><Stakeholder StakeholderTypeType=""><Name/><Description/></Stakeholder><OtherInformation/></Objective><Objective><Name>Topical Subscriptions</Name><Description>Develop prototype implementations of efficient cryptographic protocols for subscribing to topics in a stream of documents such that the subscription is kept confidential and only the matching documents are delivered</Description><Identifier>_44bbf150-149a-11e5-af57-fdf416f00357</Identifier><SequenceIndicator>8.2</SequenceIndicator><Stakeholder StakeholderTypeType=""><Name/><Description/></Stakeholder><OtherInformation/></Objective><Objective><Name>Encrypted Data Queries</Name><Description>Develop efficient homomorphic encryption techniques to implement queries on encrypted data</Description><Identifier>_44bbf290-149a-11e5-af57-fdf416f00357</Identifier><SequenceIndicator>8.3</SequenceIndicator><Stakeholder StakeholderTypeType=""><Name/><Description/></Stakeholder><OtherInformation/></Objective></Goal><Goal><Name>Securely Taking On New Executable Software of Uncertain Provenance (STONESOUP)</Name><Description>Develop and demonstrate techniques to securely execute software without basing risk mitigations on characteristics of provenance</Description><Identifier>_44bbf3ee-149a-11e5-af57-fdf416f00357</Identifier><SequenceIndicator>9</SequenceIndicator><Stakeholder StakeholderTypeType="Person"><Name>William Vanderlinde</Name><Description>Program Manager</Description></Stakeholder><Stakeholder StakeholderTypeType="Organization"><Name>SPAR</Name><Description>Related Program</Description></Stakeholder><OtherInformation>STONESOUP develops and demonstrates comprehensive, automated techniques that allow end users to securely execute software without basing risk mitigations on characteristics of provenance that have a dubious relationship to security. Existing techniques to find and remove software vulnerabilities are costly, labor-intensive, and time-consuming. Many risk management decisions are therefore based on qualitative and subjective assessments of the software suppliers' trustworthiness. STONESOUP develops software analysis, confinement, and diversification techniques so that non-experts can transform questionable software into more secure versions without changing the behavior of the programs.</OtherInformation><Objective><Name>Secure Software</Name><Description>Develops software analysis, confinement, and diversification techniques so that non-experts can transform questionable software into more secure versions without changing the behavior of the programs.</Description><Identifier>_44bbf542-149a-11e5-af57-fdf416f00357</Identifier><SequenceIndicator>9.1</SequenceIndicator><Stakeholder StakeholderTypeType=""><Name/><Description/></Stakeholder><OtherInformation/></Objective></Goal><Goal><Name>Trusted Integrated Chips (TIC)</Name><Description>Develop and demonstrate a new approach to chip fabrication where security and intellectual property protection can be assured.</Description><Identifier>_44bbf75e-149a-11e5-af57-fdf416f00357</Identifier><SequenceIndicator>10</SequenceIndicator><Stakeholder StakeholderTypeType="Person"><Name>Carl McCants</Name><Description>Program Manager</Description></Stakeholder><Stakeholder StakeholderTypeType="Generic_Group"><Name>Semiconductor Industry</Name><Description>The semiconductor industry has been advancing rapidly with aggressive scaling. Extending beyond the Moore’s Law of digital processing and storage integrated circuits, this scaling has extended to 3-dimensions to keep pace. This scaling trend has fostered the integration of diverse analog and digital components to provide high value systems such as sensors, actuators, and biochips. The key capabilities to fabricate the high performance integrated circuit components for these high value systems are in the commercial foundries, which now dominate the world’s production of high performance integrated circuits.</Description></Stakeholder><Stakeholder StakeholderTypeType="Generic_Group"><Name>US Academic Community</Name><Description>It is desirable for the US academic community and the US industrial base to have open and assured access to obtain the highest performance integrated circuits (ICs) and systems-on-chips (SoCs) while ensuring that components have been securely fabricated according to design and that intellectual property is protected.</Description></Stakeholder><Stakeholder StakeholderTypeType="Generic_Group"><Name>US Industry</Name><Description/></Stakeholder><OtherInformation>The goal of the TIC Program is to develop and demonstrate split-manufacturing, a new approach to chip fabrication where security and intellectual property protection can be assured.</OtherInformation><Objective><Name/><Description/><Identifier>_44bbf8bc-149a-11e5-af57-fdf416f00357</Identifier><SequenceIndicator/><Stakeholder StakeholderTypeType=""><Name/><Description/></Stakeholder><OtherInformation/></Objective></Goal></StrategicPlanCore><AdministrativeInformation><PublicationDate>2015-06-16</PublicationDate><Source>http://www.iarpa.gov/index.php/about-iarpa/safe-and-secure-operations</Source><Submitter><GivenName>Owen</GivenName><Surname>Ambur</Surname><PhoneNumber/><EmailAddress>Owen.Ambur@verizon.net</EmailAddress></Submitter></AdministrativeInformation></StrategicPlan>